Without changing the original intention, Xinyaohui’s high-speed interface IP assisted chip design to win the new USB standard

As a cutting-edge high-speed interface IP company, Xin Yaohui has a deep insight into the development history, future trends and design challenges of USB interfaces, and provides flexible and easy-to-use complete solutions based on years of design accumulation and excellent architecture to help designers cope with challenges. Achieve design goals.

Introduction: As a new high-speed interface IP company, Xin Yaohui has a deep insight into the development history, future trends and design challenges of USB interfaces, and provides flexible and easy-to-use complete solutions based on years of design accumulation and excellent architecture to help designers cope Challenge to achieve design goals.

Our unremitting pursuit of speed has made the pace of terminal product upgrades faster and faster. How to speed up product launches for future needs? How to deal with the challenges of high-speed interface design and testing? Recently, Anritsu, Tektronix, and GRL, a global leader in the test and measurement industry, jointly organized the 2021 High-Speed ​​Interface Joint Test Forum. In response to industry hot issues, leaders in chip design, IP and equipment are invited to conduct in-depth discussions.

As a cutting-edge high-speed interface IP company, Xinyaohui Technology was invited to attend this grand event. Liu Haopeng, the technical support director of Xingyaohui Technology, gave a wonderful sharing with the theme of “Consumer Electronics Interface Development Prospects-Will USB Dominate the World?”

Without changing the original intention, Xinyaohui’s high-speed interface IP assisted chip design to win the new USB standard
Picture: Liu Haopeng, Director of Technical Support of Xinyaohui Technology

History of development丨For 30 years, the USB king’s spirit gradually emerged

The full name of USB is Universal Serial Bus, and the name reflects its original intention of strong versatility, high transmission rate, good compatibility and plug and play. So far, the USB interface standard has gone through three stages. The first phase started in 1995. To solve the problem of interface versatility, the first generation of USB standard came out with a transmission speed of only 1.5Mbps, and the industry’s response was mediocre. The second stage started in 2000, and the USB 2.0 transmission speed reached 480Mbps, which was widely used in various data transmission applications. But in the following 5 years, the USB standard has no new bright spots.

The new breakthrough is in the third stage, marked by the release of USB 3.0 in 2008 and the breakthrough of the transmission speed to 5Gbps. Subsequently, USB3.1 with a transmission speed of 10Gbps in 2013, and USB3.2 with a transmission speed of 20Gbps in 2017 were successively released. The latest USB4, released in 2019, has a maximum speed of 40Gbps. Terminal products will be available at the end of 2020. In particular, Intel Core 11th generation products integrate Thunderbolt 4 that supports USB4, which is regarded by the industry as a landmark event that the USB4 standard has begun to spread.

Without changing the original intention, Xinyaohui’s high-speed interface IP assisted chip design to win the new USB standard
Figure: USB standard development history

Future trend丨USB technology evolution aims at high speed and compatibility

Over the years, the USB interface standard has been continuously updated and upgraded. Thanks to its strong compatibility, it is common for different generations to coexist in the market. Liu Haopeng analyzed from the perspective of the adoption of the USB application market and showed two trends: one is that in traditional applications, the pace of popularization of new standards is different; the other is that in emerging applications, new standards play a driving role.

For example, games, VR/AR and other devices are the most conservative in adopting the new USB standard. Although the demand is great, they are more eager for a unified interface, integrating all power lines, control lines, data lines, audio and video lines, etc. The new generation of USB standards such as USB4 meets the above requirements and is more suitable for this scenario. It can support 4K, 8K and even future 10K video transmission, plus advanced features such as low latency and variable refresh rate to bring users a better experience. , Will speed up the adoption of the new USB standard for such applications.

He also mentioned that the development of the application market has prompted the evolution of USB interface technology to show the following trends: continuous challenges to higher transmission speeds; continuous compatibility with multiple protocols.

It is estimated that around 2025, the transmission speed of the USB interface is expected to reach nearly 80Gbps, and it will continue to maintain its competitiveness relative to Thunderbolt. At the same time, Type-C is a unified interface form, and its mechanical and electrical characteristics will be further optimized. The connecting cables may all be replaced by active cables to adapt to the length requirements.

USB will also continue to maintain compatibility with multiple protocols, including different generations of USB standards, such as USB 3.1, USB 3.2 and USB4, as well as fast charging standards USB PD, as well as DisplayPort, PCIe, Thunderbolt, and even HDMI and Ethernet in the future. The Internet, etc. are likely to be included in the scope of USB interface support and become the king who truly “dominates the world”.

Challenges and Responses丨Xinyaohui’s advanced USB IP cracks the three major challenges of high-speed interface design

The USB market has considerable space, but the rapid implementation and iteration of products have posed more challenges to chip design and testing: extremely high transmission speeds, many interface protocols, many fast charging protocols, and accelerated protocol upgrades. As a high-speed interface IP supplier, Xin Yaohui has the following insights and provides a flexible and easy-to-use complete solution based on years of design accumulation and excellent architecture of USB PHY IP.

Challenge 1: Need to adapt to various complex application scenarios.

As shown in the figure, in order to support different encodings, including 8/10bit, 128/132bit, and optional 64/66bit; different protocols, USB, DP, and optional Thunderbolt, PCIe, etc., as well as various transmission rates and Protocol electrical characteristics, etc. IP design requires overall consideration and optimization one by one.

Without changing the original intention, Xinyaohui’s high-speed interface IP assisted chip design to win the new USB standard
Figure: USB PHY IP design challenge-adapt to complex application scenarios

Challenge 2: More stringent channel insertion loss budget.

The channel insertion loss of USB3.1 Gen1 5Gbps varies according to DFP and UFP, different interface types, budgets, and requirements for connecting cables. And USB3.1 Gen2 10Gbp, unified the budget of DFP and UFP, has nothing to do with interface type, cable. But this actually raises the design requirements for packages, PCBs, and cables in a disguised form, and it also raises the design difficulty of PHY IP. Because a chip must be adapted to a variety of different application scenarios, higher requirements are put forward for IP design, overall chip system design and testing.

Without changing the original intention, Xinyaohui’s high-speed interface IP assisted chip design to win the new USB standard
Figure: USB PHY IP design challenge-stringent channel insertion loss budget

Challenge three: USB4’s complex sender and receiver balance and strict bit error rate requirements.

The USB4 link training uses a feedback method similar to PCIe Training. While sending the training sequence, the sender feeds back the FFE request from the receiver to the sender, and finds the optimal equalization value in the preset value. USB4 should support fast traversal of up to 16 preset values. The receiving end must adapt to the period jitter of different frequencies. Each period jitter must pass the PRBS31 low error rate test. The protocol requires a bit error rate of 1e-12. In order to increase the margin of system design as much as possible, usually IP will be designed in the design Reduce the target bit error rate to 1e-13, or even lower.

Without changing the original intention, Xinyaohui’s high-speed interface IP assisted chip design to win the new USB standard
Figure: USB4 PHY IP design challenge-USB4 complex sender and receiver equalization and strict bit error rate requirements

Xingyaohui Advanced USB PHY IP Solution

In response to these design challenges, Xin Yaohui provides a flexible and complete solution to adapt to various application scenarios and is backward compatible, including USB4 and USB 3.1 Type-C solutions.

The USB 3.1Type-C solution of Xingyaohui, with leading architecture and design, has been verified in a large number of mobile applications. For all applications that require Type-C, the USB speed reaches 10Gbps, the DP HBR3 speed reaches 8.1Gbps, and it has HDCP 2.3 content protection.

Xingyaohui USB4 IP solution supports all functions in the USB4 specification; supports USB4, DisplayPort, PCIe and Thunderbolt3 through Type-C connection; the new Router IP enables USB, PCIe and DisplayPort to transmit data streams while optimizing bandwidth; Up to 40Gbps (or 20Gbps) throughput can be used in high-performance AI, high-speed storage, PC, notebook, mobile phone and tablet SoC designs.

Without changing the original intention, Xinyaohui’s high-speed interface IP assisted chip design to win the new USB standard
Figure: The advantages of Xinyaohui’s USB4 and USB 3.1Type-C complete solutions

At the end of the speech, Liu Haopeng introduced to the guests that Xinyaohui Technology is a start-up IP company with a “dream team” in the industry, dedicated to empowering customers’ chip design and system applications through advanced semiconductor IP R&D services. The founding team of Xinyaohui Technology is the top talents from IP design, chip design, software and other industries. It has worked with top and mainstream customers with mass production capabilities at home and abroad to create global leading products, and iterates together for a long time. It has more than 20 years of profound experience. Accumulate and understand the pain points of chip design, and can also provide a series of customized IP upgrade services. Xinyaohui Technology is willing to work with a wider range of customers to help chip design manufacturers achieve greater success.

The Links:   LM170E03-TLB3 VS-200MT160K

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